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November 2014
©2012 Fairchild Semiconductor Corporation
FDMC8588 Rev.D4
www.fairchildsemi.com
1
FDMC8588 N-Channel PowerTrench® MOSFET
FDMC8588
N-Channel PowerTrench® MOSFET
25 V, 40 A, 5.7 mΩ
Features
Max rDS(on) = 5.7 mΩ at VGS = 4.5 V, ID = 16.5 A
State-of-the-art switching performance
Lower output capacitance, gate resistance, and gate charge
boost efficiency
Shielded gate technology reduces switch node ringing and
increases immunity to EMI and cross conduction
RoHS Compliant
General Description
This N-Channel MOSFET has been designed specifically to
improve the overall efficiency and to minimize switch node
ringing of DC/DC converters using either synchronous or
conventional switching PWM controllers. It has been optimized
for low gate charge, low rDS(on), fast switching speed and body
diode reverse recovery performance.
Applications
High side switching for high end computing
High power density DC-DC synchronous buck converter
S
S
S
G
D
D
D
D
Top
Power 33
Bottom
DDDD
SSSG
Pin 1
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Thermal Characteristics
Package Marking and Ordering Information
Symbol Parameter Ratings Units
VDS Drain to Source Voltage (Note 5) 25 V
VGS Gate to Source Voltage (Note 4) ±12 V
ID
Drain Current - Continuous (Package limited) TC = 25 °C 40
A
- Continuous (Silicon Limited) TC = 25 °C 59
- Continuous (Note 1a) 16.5
- Pulsed 60
EAS Single Pulse Avalanche Energy (Note 3) 29 mJ
PD
Power Dissipation TC = 25 °C 26 W
Power Dissipation TA = 25 °C (Note 1a) 2.4
TJ, TSTG Operating and Storage Junction Temperature Range -55 to +150 °C
RθJC Thermal Resistance, Junction to Case TC = 25 °C 4.7 °C/W
RθJA Thermal Resistance, Junction to Ambient TA = 25 °C (Note 1a) 53
Device Marking Device Package Reel Size Tape Width Quantity
08OD FDMC8588 Power 33 13 ’’ 12 mm 3000 units
www.fairchildsemi.com
2
©2012 Fairchild Semiconductor Corporation
FDMC8588 Rev.D4
FDMC8588 N-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
Notes:
Symbol Parameter Test Conditions Min Typ Max Units
BVDSS Drain to Source Breakdown Voltage ID = 250 μA , VGS = 0 V 25 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient ID = 250 μA , referenced to 25 °C 17 mV/°C
IDSS Zero Gate Voltage Drain Current VDS = 20 V, VGS = 0 V 1 μA
IGSS Gate to Source Leakage Current, Forward VGS = 12 V, VDS = 0 V 100 nA
VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA 0.8 1.4 1.8 V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient ID = 250 μA , referenced to 25 °C -4 mV/°C
rDS(on) Static Drain to Source On Resistance
VGS = 10 V, ID = 17 A 3.5 5.0
mΩVGS = 4.5 V, ID = 16.5 A 4.3 5.7
VGS = 10 V, ID = 17 A,TJ = 125 °C 4.8 6.9
gFS Forward Transconductance VDD = 5 V, ID = 16.5 A 85 S
Ciss Input Capacitance VDS = 13 V, VGS = 0 V,
f = 1 MHz
1228 1720 pF
Coss Output Capacitance 441 620 pF
Crss Reverse Transfer Capacitance 69 100 pF
RgGate Resistance 0.1 0.5 1.5 Ω
td(on) Turn-On Delay Time
VDD = 13 V, ID = 16.5A,
VGS = 10 V, RGEN = 6 Ω
816ns
trRise Time 310ns
td(off) Turn-Off Delay Time 25 40 ns
tfFall Time 210ns
Qg(TOT) Total Gate Charge at 4.5V
VDD = 13 V, ID = 16.5 A
12 17 nC
Qgs Total Gate Charge 3.0 nC
Qgd Gate to Drain “Miller” Charge 3.3 nC
VSD Source to Drain Diode Forward Voltage VGS = 0 V, IS = 2 A (Note 2) 0.7 1.2 V
VGS = 0 V, IS = 16.5 A (Note 2) 0.8 1.2 V
trr Reverse Recovery Time IF = 16.5 A, di/dt = 100 A/μs 25 ns
Qrr Reverse Recovery Charge 10 nC
1. RθJA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. EAS of 29 mJ is based on starting TJ = 25 °C, L = 1.2 mH, IAS = 7 A, VDD = 23 V, VGS = 10V. 100% tested at L = 0.1 mH, IAS = 16 A.
4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
5. The continuous Vds rating is 25V; however, a pulse of 28 V peak voltage for no longer than 3ns duration at 500KHz frequency can be applied.
53 °C/W when mounted on a
1 in2 pad of 2 oz copper
a.
125 °C/W when mounted on
a minimum pad of 2 oz copper
b.
G
DF
DS
SF
SS
G
DF
DS
SF
SS
www.fairchildsemi.com
3
©2012 Fairchild Semiconductor Corporation
FDMC8588 Rev.D4
FDMC8588 N-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25°C unless otherwise noted
Figure 1.
0.0 0.2 0.4 0.6
0
10
20
30
40
50
60
VGS = 2.5 V
VGS = 3 V
VGS = 4 V
VGS = 4.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 10 V
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
On Region Characteristics Figure 2.
0 102030405060
0.5
1.0
1.5
2.0
2.5
3.0
VGS = 4 V VGS = 3 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
ID, DRAIN CURRENT (A)
VGS = 2.5 V
VGS = 4.5 V VGS = 10 V
N o r m a l i z e d O n - R e s i s t a n c e
vs. Drain Current and Gate Voltage
F i g u r e 3 . N o r m a l i z e d O n R e s i s t a n c e
-75 -50 -25 0 25 50 75 100 125 150
0.6
0.8
1.0
1.2
1.4
1.6
ID = 16.5 A
VGS = 10 V
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
TJ, JUNCTION TEMPERATURE (oC)
vs. Junction Temperature
Figure 4.
0246810
0
5
10
15
20
TJ = 125 oC
ID = 16.5 A
TJ = 25 oC
VGS, GATE TO SOURCE VOLTAGE (V)
rDS(on), DRAIN TO
SOURCE ON-RESISTANCE (mΩ)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
O n- Re si st an ce vs . Ga t e to
Source Voltage
Figure 5. Transfer Characteristics
0.5 1.0 1.5 2.0 2.5 3.0
0
10
20
30
40
50
60
TJ = 150 oC
VDS = 5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
TJ = -55 oC
TJ = 25 oC
ID, DRAIN CURRENT (A)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 6.
0.00.20.40.60.81.01.2
0.1
1
10
60
TJ = -55 oC
TJ = 25 oC
TJ = 150 oC
VGS = 0 V
IS, REVERSE DRAIN CURRENT (A)
VSD, BODY DIODE FORWARD VOLTAGE (V)
S ou rc e t o D ra in D i o de
Forward Voltage vs. Source Current
www.fairchildsemi.com
4
©2012 Fairchild Semiconductor Corporation
FDMC8588 Rev.D4
FDMC8588 N-Channel PowerTrench® MOSFET
Figure 7.
024681012
0.0
0.9
1.8
2.7
3.6
4.5
ID = 16.5 A
VDD = 15 V
VDD = 10 V
VGS, GATE TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
VDD = 13 V
Gate Charge Characteristics Figure 8.
0.1 1 10 30
30
100
1000
3000
f = 1 MHz
VGS = 0 V
CAPACITANCE (pF)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Crss
Coss
Ciss
C a p a c i t a n c e v s . D r a i n
to Source Voltage
Figure 9.
0.001 0.01 0.1 1 10 100
1
10
50
TJ = 100 oC
TJ = 25 oC
TJ = 125 oC
tAV, TIME IN AVALANCHE (ms)
IAS, AVALANCHE CURRENT (A)
U n c l a m p e d I n d u c t i v e
Switching Capability
Figure 10.
M a x i m u m C o n t i n u o u s D r a i n
Current vs. Case Temperature
Figure 11. Fo r w a r d Bi a s S afe
Operating Area
0.01 0.1 1 10 100200
0.01
0.1
1
10
100
100 μs
10 ms
10 s
100 ms
DC
1 s
1 ms
ID, DRAIN CURRENT (A)
VDS, DRAIN to SOURCE VOLTAGE (V)
THIS AREA IS
LIMITED BY rDS(on)
SINGLE PULSE
TJ = MAX RATED
RθJA = 125 oC/W
TA = 25 oC
Figure 12.
10-4 10-3 10-2 10-1 100101100 1000
0.5
1
10
100
1000
SINGLE PULSE
RθJA = 125 oC/W
TA = 25 oC
P(PK), PEAK TRANSIENT POWER (W)
t, PULSE WIDTH (sec)
S i n g l e P u l s e M a x i m u m
Power Dissipation
Typical Characteristics TJ = 25°C unless otherwise noted
www.fairchildsemi.com
5
©2012 Fairchild Semiconductor Corporation
FDMC8588 Rev.D4
FDMC8588 N-Channel PowerTrench® MOSFET
Figure 13.
10-4 10-3 10-2 10-1 100101100 1000
5E-4
1E-3
0.01
0.1
1
2
D = 0.5
0.2
0.1
0.05
0.02
0.01
SINGLE PULSE
RθJA = 125 oC/W
DUTY CYCLE-DESCENDING ORDER
NORMALIZED THERMAL
IMPEDANCE, ZθJA
t, RECTANGULAR PULSE DURATION (sec)
PDM
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
Junction-to-Ambient Transient Thermal Response Curve
Typical Characteristics TJ = 25°C unless otherwise noted
SCALE: 2X
8
1
5
4
41
85
LAND PATTERN
RECOMMENDATION
14
85
PKG
C
L
PKG
L
C
PKG
L
C
L
C
SYM
SEE
DETAIL A
NOTES: UNLESS OTHERWISE SPECIFIED
A) PACK A GE STAN DARD REFERENCE:
JEDEC MO-240, ISSUE A, VAR. BA,
DATED OCTOBER 2002.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENS I ONS DO NO T I N CLUDE BURRS
OR MOLD FLASH. MOLD FLASH OR
BURRS DOES NOT EXCEED 0.10MM.
D) DIMENSIONING AND TOLERANCING PER
ASME Y14.5M-1994.
E) IT IS RECOMMENDED TO HAVE NO TRACES
OR VIAS WITHIN THE KEEP OUT AREA.
F) DRAWING FILE NAME: PQFN08BREV2
SEATING
PLANE
3.40
3.20 A
B
3.40
3.20
2.37 MIN
(0.45)
(0.40)
(0.65)
2.15 MIN
0.70 MIN
0.42 MIN0.65 1.95
0.65
1.95
0.37
0.27
0.10 C A B
0.50
0.30
(1.65) 2.09
1.89
(2.27)
0.52
(0.39)
(0.67)
(0.20)
1.00
0.85
0.10 C
0.08 C
0.23
0.18
0.05
0.00 C
KEEP
OUT
AREA
3.40
1.70
www.onsemi.com
1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
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ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
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claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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