LMC6762AIM/NOPB - NATIONAL SEMICONDUCTOR

LMC6762

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SNOS739D –JULY 1997–REVISED MARCH 2013

LMC6762 Dual MicroPower Rail-To-Rail Input CMOS Comparator with Push-Pull Output

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1FEATURES DESCRIPTION

The LMC6762 is an ultra low power dual comparator

2• (Typical Unless Otherwise Noted) with a maximum supply current of 10 μA/comparator.

• Low Power Consumption (Max): IS= 10 It is designed to operate over a wide range of supply

μA/comp voltages, from 2.7V to 15V. The LMC6762 has

• Wide Range of Supply Voltages: 2.7V to 15V ensured specifications at 2.7V to meet the demands

of 3V digital systems.

• Rail-To-Rail Input Common Mode Voltage

Range The LMC6762 has an input common-mode voltage

range which exceeds both supplies. This is a

• Rail-To-Rail Output Swing (Within 100 mV of significant advantage in low-voltage applications. The

the Supplies, @ V+= 2.7V, and ILOAD = 2.5 mA) LMC6762 also features a push-pull output that allows

• Short Circuit Protection: 40 mA direct connections to logic devices without a pull-up

• Propagation Delay (@ V+= 5V, 100 mV resistor.

Overdrive): 4 μsA quiescent power consumption of 50 μW/amplifier

(@ V+= 5V) makes the LMC6762 ideal for

APPLICATIONS applications in portable phones and hand-held

electronics. The ultra-low supply current is also

• Laptop Computers independent of power supply voltage. Ensured

• Mobile Phones operation at 2.7V and a rail-to-rail performance

• Metering Systems makes this device ideal for battery-powered

• Hand-Held Electronics applications.

• RC Timers Refer to the LMC6772 datasheet for an open-drain

version of this device.

• Alarm and Monitoring Circuits

• Window Comparators, Multivibrators

Connection Diagram Typical Application

8-Pin PDIP/SOIC

Top View

Zero Crossing Detector

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

LMC6762

SNOS739D –JULY 1997–REVISED MARCH 2013

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Absolute Maximum Ratings(1)(2)

ESD Tolerance(3) 2 KV

Differential Input Voltage (V+)+0.3V to (V−)−0.3V

Voltage at Input/Output Pin (V+)+0.3V to (V−)−0.3V

Supply Voltage (V+–V−) 16V

Current at Input Pin ±5 mA

Current at Output Pin(4)(5) ±30 mA

Current at Power Supply Pin, LMC6762 40 mA

Lead Temperature (Soldering, 10 seconds) 260°C

Storage Temperature Range −65°C to +150°C

Junction Temperature(6) 150°C

(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for

which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test

conditions, see the electrical characteristics.

(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.

(3) Human body model, 1.5 kΩin series with 100 pF.

(4) Do not short circuit output to V+, when V+is greater than 12V or reliability will be adversely affected.

(5) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in

exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30 mA over long term may adversely

affect reliability.

(6) The maximum power dissipation is a function of TJ(max),θJA, and TA. The maximum allowable power dissipation at any ambient

temperature is PD= (TJ(max) – TA)/θJA.All numbers apply for packages soldered directly into a PC board.

Operating Ratings(1)

Supply Voltage 2.7 ≤VS≤15V

Junction Temperature Range LMC6762AI, LMC6762BI −40°C ≤TJ≤+85°C

Thermal Resistance (θJA) P0008E Package, 8-Pin PDIP 100°C/W

D0008A Package, 8-Pin SOIC 172°C/W

(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for

which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test

conditions, see the electrical characteristics.

2.7V Electrical Characteristics

Unless otherwise specified, all limits ensured for TJ= 25°C, V+= 2.7V, V−= 0V, VCM = V+/2. Boldface limits apply at the

temperature extremes. LMC6762AI LMC6762BI Units

Symbol Parameter Conditions Typ(1) Limit(2) Limit(2)

VOS Input Offset Voltage 3 5 15 mV

8 18 max

TCVOS Input Offset Voltage 2.0 μV/°C

Temperature Drift

Input Offset Voltage See(3) 3.3 μV/Month

Average Drift

IBInput Current 0.02 pA

IOS Input Offset Current 0.01 pA

CMRR Common Mode Rejection Ratio 75 dB

PSRR Power Supply Rejection Ratio ±1.35V < VS< ±7.5V 80 dB

AVVoltage Gain (By Design) 100 dB

(1) Typical Values represent the most likely parametric norm.

(2) All limits are specified by testing or statistical analysis.

(3) Input Offset Voltage Average Drift is calculated by dividing the accelerated operating life drift average by the equivalent operational time.

The Input Offset Voltage Average Drift represents the input offset voltage change at worst-case input conditions.

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2.7V Electrical Characteristics (continued)

Unless otherwise specified, all limits ensured for TJ= 25°C, V+= 2.7V, V−= 0V, VCM = V+/2. Boldface limits apply at the

temperature extremes. LMC6762AI LMC6762BI Units

Symbol Parameter Conditions Typ(1) Limit(2) Limit(2)

VCM Input Common-Mode CMRR > 55 dB 3.0 2.9 2.9 V

Voltage Range 2.7 2.7 min

−0.3 −0.2 −0.2 V

0.0 0.0 max

VOH Output Voltage High ILOAD = 2.5 mA 2.5 2.4 2.4 V

2.3 2.3 min

VOL Output Voltage Low ILOAD = 2.5 mA 0.2 0.3 0.3 V

0.4 0.4 max

ISSupply Current For Both Comparators 12 20 20 μA

(Output Low) 25 25 max

5.0V and 15.0V Electrical Characteristics

Unless otherwise specified, all limits ensured for TJ= 25°C, V+= 5.0V and 15.0V, V−= 0V, VCM = V+/2. Boldface limits apply

at the temperature extremes. LMC6762AI LMC6762BI

Symbol Parameter Conditions Typ(1) Units

Limit(2) Limit(1)

VOS Input Offset Voltage 3 5 15 mV

8 18 max

TCVOS Input Offset Voltage V+= 5V 2.0 μV/°C

Temperature Drift V+= 15V 4.0

Input Offset Voltage V+= 5V(3) 3.3 μV/Month

Average Drift V+= 15V(3) 4.0

IBInput Current V = 5V 0.04 pA

IOS Input Offset Current V+= 5V 0.02 pA

CMRR Common Mode V+= 5V 75 dB

Rejection Ratio V+= 15V 82 dB

PSRR Power Supply Rejection Ratio ±2.5V < VS< ±5V 80 dB

AVVoltage Gain (By Design) 100 dB

VCM Input Common-Mode V+= 5.0V 5.3 5.2 5.2 V

Voltage Range CMRR > 55 dB 5.0 5.0 min

−0.3 −0.2 −0.2 V

0.0 0.0 max

V+= 15.0V 15.3 15.2 15.2 V

CMRR > 55 dB 15.0 15.0 min

−0.3 −0.2 −0.2 V

0.0 0.0 max

VOH Output Voltage High V+= 5V 4.8 4.6 4.6 V

ILOAD = 5mA 4.45 4.45 min

V+= 15V 14.8 14.6 14.6 V

ILOAD = 5 mA 14.45 14.45 min

(1) Typical Values represent the most likely parametric norm.

(2) All limits are specified by testing or statistical analysis.

(3) Input Offset Voltage Average Drift is calculated by dividing the accelerated operating life drift average by the equivalent operational time.

The Input Offset Voltage Average Drift represents the input offset voltage change at worst-case input conditions.

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5.0V and 15.0V Electrical Characteristics (continued)

Unless otherwise specified, all limits ensured for TJ= 25°C, V+= 5.0V and 15.0V, V−= 0V, VCM = V+/2. Boldface limits apply

at the temperature extremes. LMC6762AI LMC6762BI

Symbol Parameter Conditions Typ(1) Units

Limit(2) Limit(1)

VOL Output Voltage Low V+= 5V 0.2 0.4 0.4 V

ILOAD = 5 mA 0.55 0.55 max

V+= 15V 0.2 0.4 0.4 V

ILOAD = 5 mA 0.55 0.55 max

ISSupply Current For Both Comparators 12 20 20 μA

(Output Low) 25 25 max

ISC Short Circuit Current Sourcing 30 mA

Sinking, VO= 12V(4) 45

(4) Do not short circuit output to V+, when V+is greater than 12V or reliability will be adversely affected.

AC Electrical Characteristics

Unless otherwise specified, all limits ensured for TJ= 25°C, V+= 5V, V−= 0V, VCM = VO= V+/2. Boldface limits apply at the

temperature extreme.

Symbol Parameter Conditions Typ(1) LMC6762AI LMC6762BI Units

Limit(2) Limit(2)

tRISE Rise Time f = 10 kHz, CL= 50 pF, 0.3 μs

Overdrive = 10 mV(3)(4)

tFALL Fall Time f = 10 kHz, CL= 50 pF, 0.3 μs

Overdrive = 10 mV(3)(4)

tPHL Propagation Delay f = 10 kHz, Overdrive = 10 mV 10 μs

(High to Low) CL= 50 pF(3)(4) Overdrive = 100 mV 4 μs

V+= 2.7V, Overdrive = 10 mV 10 μs

f = 10 kHz,

CL= 50 pF(3)(4) Overdrive = 100 mV 4 μs

tPLH Propagation Delay f = 10 kHz, Overdrive = 10 mV 6 μs

(Low to High) CL= 50 pF(3)(4) Overdrive = 100 mV 4 μs

V+= 2.7V, Overdrive = 10 mV 7 μs

f = 10 kHz,

CL= 50 pF(3)(4) Overdrive = 100 mV 4 μs

(1) Typical Values represent the most likely parametric norm.

(2) All limits are specified by testing or statistical analysis.

(3) CLincludes the probe and jig capacitance.

(4) The rise and fall times are measured with a 2V input step. The propagation delays are also measured with a 2V input step.

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Typical Performance Characteristics

V+= 5V, Single Supply, TA= 25°C unless otherwise specified

Supply Current Supply Current

vs vs

Supply Supply

Voltage (Output High) Voltage (Output Low)

Figure 1. Figure 2.

Input Current vs Input Current vs

Common-Mode Voltage Common-Mode Voltage

Figure 3. Figure 4.

Input Current vs Input Current

Common-Mode Voltage vs Temperature

Figure 5. Figure 6.

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Typical Performance Characteristics (continued)

V+= 5V, Single Supply, TA= 25°C unless otherwise specified

ΔVOS ΔVOS

vs vs

ΔVCM ΔVCM

Figure 7. Figure 8.

ΔVOS

vs Output Voltage vs

ΔVCM Output Current (Sourcing)

Figure 9. Figure 10.

Output Voltage vs Output Voltage vs

Output Current (Sourcing) Output Current (Sourcing)

Figure 11. Figure 12.

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Typical Performance Characteristics (continued)

V+= 5V, Single Supply, TA= 25°C unless otherwise specified

Output Voltage vs Output Voltage vs

Output Current (Sinking) Output Current (Sinking)

Figure 13. Figure 14.

Output Voltage vs Output Short Circuit Current

Output Current (Sinking) vs Supply Voltage (Sourcing)

Figure 15. Figure 16.

Output Short Circuit Current Response Time for

vs Supply Voltage (Sinking) Overdrive (tPLH)

Figure 17. Figure 18.

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Typical Performance Characteristics (continued)

V+= 5V, Single Supply, TA= 25°C unless otherwise specified

Response Time for Response Time for

Overdrive (tPHL) Overdrive (tPLH)

Figure 19. Figure 20.

Response Time for Response Time for

Overdrive (tPHL) Overdrive (tPLH)

Figure 21. Figure 22.

Response Time for Response Time vs

Overdrive (tPHL) Capacitive Load

Figure 23. Figure 24.

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SNOS739D –JULY 1997–REVISED MARCH 2013

APPLICATION HINTS

Input Common-Mode Voltage Range

At supply voltages of 2.7V, 5V and 15V, the LMC6762 has an input common-mode voltage range which exceeds

both supplies. As in the case of operational amplifiers, CMVR is defined by the VOS shift of the comparator over

the common-mode range of the device. A CMRR (ΔVOS/ΔVCM) of 75 dB (typical) implies a shift of < 1 mV over

the entire common-mode range of the device. The absolute maximum input voltage at V+= 5V is 200 mV beyond

either supply rail at room temperature.

Figure 25. An Input Signal Exceeds the LMC6762 Power Supply Voltages

with No Output Phase Inversion

A wide input voltage range means that the comparator can be used to sense signals close to ground and also to

the power supplies. This is an extremely useful feature in power supply monitoring circuits.

An input common-mode voltage range that exceeds the supplies, 20 fA input currents (typical), and a high input

impedance makes the LMC6762 ideal for sensor applications. The LMC6762 can directly interface to sensors

without the use of amplifiers or bias circuits. In circuits with sensors which produce outputs in the tens to

hundreds of millivolts, the LMC6762 can compare the sensor signal with an appropriately small reference

voltage. This reference voltage can be close to ground or the positive supply rail.

Low Voltage Operation

Comparators are the common devices by which analog signals interface with digital circuits. The LMC6762 has

been designed to operate at supply voltages of 2.7V without sacrificing performance to meet the demands of 3V

digital systems.

At supply voltages of 2.7V, the common-mode voltage range extends 200 mV (ensured) below the negative

supply. This feature, in addition to the comparator being able to sense signals near the positive rail, is extremely

useful in low voltage applications.

Figure 26. Even at Low-Supply Voltage of 2.7V,

an Input Signal which Exceeds the Supply Voltages Produces No Phase Inversion at the Output

At V+= 2.7V, propagation delays are tPLH =4μs and tPHL =4μs with overdrives of 100 mV. Please refer to the

performance curves for more extensive characterization.

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Shoot-Through Current

The shoot-through current is defined as the current surge, above the quiescent supply current, between the

positive and negative supplies of a device. The current surge occurs when the output of the device switches

states. This transient switching current results in glitches in the supply voltage. Usually, glitches in the supply

lines are compensated by bypass capacitors. When the switching currents are minimal, the values of the bypass

capacitors can be reduced considerably.

Figure 27. LMC6762 Circuit for Measurement of the Shoot-Through Current

Figure 28. Measurement of the Shoot-Through Current

From Figure 27 and Figure 28 the shoot-through current for the LMC6762 can be approximated to be 0.2 mA

(200 mV/1 kΩ). The duration of the transient is measured as 1 μs. The values needed for the local bypass

capacitors can be calculated as follows:

Area of Δ= ½ (1 μs × 200 μA)

= 100 pC

If the local bypass capacitor has to provide this charge of 100 pC, the minimum value of the local capacitor to

prevent local degradation of VCC can be calculated. Suppose that the maximum voltage droop that the system

can tolerate is 100mV,

ΔQ=C*(ΔV)

→C= (ΔQ/ΔV)

= 100 pC/100 mV

= 0.001 μF

The low internal feedthrough current of the LMC6762 thus requires lower values for the local bypass capacitors.

In applications where precision is not critical, this is a significant advantage, as lower values of capacitors result

in savings of board space, and cost.

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It is worth noting here that the delta shift of the power supply voltage due to the transient currents causes a

threshold shift of the comparator. This threshold shift is reduced by the high PSRR of the comparator. However,

the value of the PSRR applicable in this instance is the transient PSRR and not the DC PSRR. The transient

PSRR is significantly lower than the DC PSRR.

Generally, it is a good goal to reduce the delta voltage on the power supply to a value equal to or less than the

hysteresis of the comparator. For example, if the comparator has 50 mV of hysteresis, it would be reasonable to

increase the value of the local bypass capacitor to 0.01 μF to reduce the voltage delta to 10 mV.

Output Short Circuit Current

The LMC6762 has short circuit protection of 40 mA. However, it is not designed to withstand continuous short

circuits, transient voltage or current spikes, or shorts to any voltage beyond the supplies. A resistor is series with

the output should reduce the effect of shorts. For outputs which send signals off PC boards additional protection

devices, such as diodes to the supply rails, and varistors may be used.

Hysteresis

If the input signal is very noisy, the comparator output might trip several times as the input signal repeatedly

passes through the threshold. This problem can be addressed by making use of hysteresis as shown below.

Figure 29. Canceling the Effect of Input Capacitance

The capacitor added across the feedback resistor increases the switching speed and provides more short term

hysteresis. This can result in greater noise immunity for the circuit.

Spice Macromodel

A Spice Macromodel is available for the LMC6762. The model includes a simulation of:

• Input common-mode voltage range

• Quiescent and dynamic supply current

• Input overdrive characteristics

and many more characteristics as listed on the macromodel disk.

A SPICE macromodel of this and many other op amps is available at no charge from the WEBENCH Design

Center Team at http://www.ti.com/ww/en/analog/webench/

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Typical Applications

One-Shot Multivibrator

Figure 30. One-Shot Multivibrator

A monostable multivibrator has one stable state in which it can remain indefinitely. It can be triggered externally

to another quasi-stable state. A monostable multivibrator can thus be used to generate a pulse of desired width.

The desired pulse width is set by adjusting the values of C2and R4. The resistor divider of R1and R2can be

used to determine the magnitude of the input trigger pulse. The LMC6762 will change state when V1< V2. Diode

D2provides a rapid discharge path for capacitor C2to reset at the end of the pulse. The diode also prevents the

non-inverting input from being driven below ground.

Bi-Stable Multivibrator

Figure 31. Bi-Stable Multivibrator

A bi-stable multivibrator has two stable states. The reference voltage is set up by the voltage divider of R2and

R3. A pulse applied to the SET terminal will switch the output of the comparator high. The resistor divider of R1,

R4, and R5now clamps the non-inverting input to a voltage greater than the reference voltage. A pulse applied to

RESET will now toggle the output low.

Zero Crossing Detector

Figure 32. Zero Crossing Detector

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A voltage divider of R4and R5establishes a reference voltage V1at the non-inverting input. By making the series

resistance of R1and R2equal to R5, the comparator will switch when VIN = 0. Diode D1insures that V3never

drops below −0.7V. The voltage divider of R2and R3then prevents V2from going below ground. A small amount

of hysteresis is setup to ensure rapid output voltage transitions.

Oscillator

Figure 33. Square Wave Generator

Figure 33 shows the application of the LMC6762 in a square wave generator circuit. The total hysteresis of the

loop is set by R1, R2and R3. R4and R5provide separate charge and discharge paths for the capacitor C. The

charge path is set through R4and D1. So, the pulse width t1is determined by the RC time constant of R4and C.

Similarly, the discharge path for the capacitor is set by R5and D2. Thus, the time t2between the pulses can be

changed by varying R5, and the pulse width can be altered by R4. The frequency of the output can be changed

by varying both R4and R5.

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Figure 34. Time Delay Generator

The circuit shown above provides output signals at a prescribed time interval from a time reference and

automatically resets the output when the input returns to ground. Consider the case of VIN = 0. The output of

comparator 4 is also at ground. This implies that the outputs of comparators 1, 2, and 3 are also at ground.

When an input signal is applied, the output of comparator 4 swings high and C charges exponentially through R.

This is indicated above.

The output voltages of comparators 1, 2, and 3 switch to the high state when VC1 rises above the reference

voltage VA, VBand VC. A small amount of hysteresis has been provided to insure fast switching when the RC

time constant is chosen to give long delay times.

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REVISION HISTORY

Changes from Revision C (March 2013) to Revision D Page

• Changed layout of National Data Sheet to TI format .......................................................................................................... 14

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PACKAGE OPTION ADDENDUM

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Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead finish/

Ball material

(6)

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

LMC6762AIM ACTIVE SOIC D 8 95 Non-RoHS

& Green Call TI Call TI -40 to 85 LMC67

62AIM

LMC6762AIM/NOPB ACTIVE SOIC D 8 95 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 LMC67

62AIM

LMC6762AIMX ACTIVE SOIC D 8 2500 Non-RoHS

& Green Call TI Call TI -40 to 85 LMC67

62AIM

LMC6762AIMX/NOPB ACTIVE SOIC D 8 2500 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 LMC67

62AIM

LMC6762BIM ACTIVE SOIC D 8 95 Non-RoHS

& Green Call TI Call TI -40 to 85 LMC67

62BIM

LMC6762BIM/NOPB ACTIVE SOIC D 8 95 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 LMC67

62BIM

LMC6762BIMX ACTIVE SOIC D 8 2500 Non-RoHS

& Green Call TI Call TI -40 to 85 LMC67

62BIM

LMC6762BIMX/NOPB ACTIVE SOIC D 8 2500 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 LMC67

62BIM

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

PACKAGE OPTION ADDENDUM

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Addendum-Page 2

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two

lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

LMC6762AIMX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1

LMC6762AIMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1

LMC6762BIMX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1

LMC6762BIMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1

PACKAGE MATERIALS INFORMATION

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Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

LMC6762AIMX SOIC D 8 2500 367.0 367.0 35.0

LMC6762AIMX/NOPB SOIC D 8 2500 367.0 367.0 35.0

LMC6762BIMX SOIC D 8 2500 367.0 367.0 35.0

LMC6762BIMX/NOPB SOIC D 8 2500 367.0 367.0 35.0

PACKAGE MATERIALS INFORMATION

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Pack Materials-Page 2

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PACKAGE OUTLINE

.228-.244 TYP

[5.80-6.19]

.069 MAX

[1.75]

6X .050

[1.27]

8X .012-.020

[0.31-0.51]

.150

[3.81]

.005-.010 TYP

[0.13-0.25]

0 - 8 .004-.010

[0.11-0.25]

.010

[0.25]

.016-.050

[0.41-1.27]

4X (0 -15 )

.189-.197

[4.81-5.00]

NOTE 3

B .150-.157

[3.81-3.98]

NOTE 4

4X (0 -15 )

(.041)

[1.04]

SOIC - 1.75 mm max heightD0008A

SMALL OUTLINE INTEGRATED CIRCUIT

4214825/C 02/2019

NOTES:

1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.

Dimensioning and tolerancing per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not

exceed .006 [0.15] per side.

4. This dimension does not include interlead flash.

5. Reference JEDEC registration MS-012, variation AA.

.010 [0.25] C A B

PIN 1 ID AREA

SEATING PLANE

.004 [0.1] C

SEE DETAIL A

DETAIL A

TYPICAL

SCALE 2.800

www.ti.com

EXAMPLE BOARD LAYOUT

.0028 MAX

[0.07]

ALL AROUND

.0028 MIN

[0.07]

ALL AROUND

(.213)

[5.4]

6X (.050 )

[1.27]

8X (.061 )

[1.55]

8X (.024)

[0.6]

(R.002 ) TYP

[0.05]

SOIC - 1.75 mm max heightD0008A

SMALL OUTLINE INTEGRATED CIRCUIT

4214825/C 02/2019

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

METAL SOLDER MASK

OPENING

NON SOLDER MASK

DEFINED

SOLDER MASK DETAILS

EXPOSED

METAL

OPENING

SOLDER MASK METAL UNDER

SOLDER MASK

DEFINED

EXPOSED

METAL

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:8X

SYMM

SEE

DETAILS

SYMM

www.ti.com

EXAMPLE STENCIL DESIGN

8X (.061 )

[1.55]

8X (.024)

[0.6]

6X (.050 )

[1.27] (.213)

[5.4]

(R.002 ) TYP

[0.05]

SOIC - 1.75 mm max heightD0008A

SMALL OUTLINE INTEGRATED CIRCUIT

4214825/C 02/2019

NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

9. Board assembly site may have different recommendations for stencil design.

SOLDER PASTE EXAMPLE

BASED ON .005 INCH [0.125 MM] THICK STENCIL

SCALE:8X

SYMM

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