UC3842AN - Fairchild Semiconductor

www.fairchildsemi.com

Rev. 5.0

Features

• Low Start Current 0.2mA (typ)

• Op erating Range Up To 500KHz

• Cycle by Cycle Current Limiting

• Under Voltage Lock Out With Hysteresis

• Short Sh utdown Dela y Time: typ.100ns

• High Current Totem-pole Output

• Outp ut S wing Limi t ing: 22 V

Description

The UC 3842 A/UC 38 43A ar e fixe d P WM co ntrol ler for O f f-

Line and DC to DC converter applications. The internal cir-

cuits include UVLO, low start up current circuit, tempera-

ture compensated reference, high gain error am plifier,

curre nt sensi n g c omp a rat o r, and high cu rr ent tot e m -p ole out -

put for driving a POWER MOSFET. Also UC3842A/

UC3843A provide low start up current below 0.3mA and

short shutdown delay time typ. 100ns. The UC3842A has

UVLO thr esho ld o f 16V (on ) an d 10V (of f ). Th e U C3843 A i s

8.4V(on) a nd 7.6 V(off). The UC3842A and UC3843A can

operate within 100% duty cycle.

8-DIP

8-SOP 1

Internal Block Diagram

SET/

RESET

VREF

Internal

Bias Good LOGIC

OSCILLATOR

UVLO

29V

22V

1/3

Error Amp

1/2VREF

C.S

Comp. PWM

LATCH

VREF

VFB

COMP

C.S

RT/CT

OUTPUT

VCC

GND

PWR

GND

UC3842A/UC3843A

SMPS Controller

UC3842A/UC3843A

Absolute Maximum Ratings

Electrical Characteristics

(VCC = 15V, RT = 10KΩ, CT = 3.3nF, TA = 0°C to + 70°C ,Unless otherwise specified)

Parameter Symbol Value Unit

Supply Voltage VCC 30 V

Output Current IO± 1 A

Analog Inputs (pin 2, 3) VI(ANA) - 0.3 to 6.3 V

Error Amp. Output Sink Current ISINK(EA) 10 mA

Power Dissipation PD1W

Parameter Symbol Conditions Min. Typ. Max. Unit

REFERENCE SECTION

Output Voltage VREF TJ = 25°C, IO = 1mA 4.9 5.0 5.1 V

Line Regulation ∆VREF VCC = 12V to 25V - 6 20 mV

Load Regulation ∆VREF IO = 1mA to 20mA - 6 25 mV

Output Short Circuit ISC Ta = 25°C- - 100 - 180 mA

OSILLATOR SECTION

Initial Accuracy FOSC TJ = 25°C47 52 57 KHz

Voltage Stability STV VCC = 12V to 25V - 0.2 1 %

Amplitude VOSC VPIN4, Peak to Peak - 1.7 - V

Discharge Current IDISCHG TJ = 25°C, Pin4 = 2V 7.8 8.3 8.8 mA

CURRENT SENSE SECTION

Gain GV (NOTE 2, 3) 2.85 3 3.15 V/V

Maximum Input Signal VI(MAX) VPIN1 = 5V(NOTE 2) 0.9 1.0 1.1 V

PSRR PSRR VCC = 12V to 25V (NOTE 1, 2) - 70 - dB

Input Bias Current IBIAS -- - 2 -10 uA

Delay to Output TD VPIN3 = 0 V to 2V (NOTE1) - 100 200 ns

UC3842A/UC3843A

Electrical Characteristics (Continued)

(VCC = 15V, RT = 10KΩ, CT = 3. 3nF, TA = 0°C to + 70°C, Unless otherwise specified)

* Adjust VCC above the start threshold before setting at 15V

Notes :

1. These parameters, although guaranteed, are not 100% tested in production.

2. Parameter measured at trip point of latch with V2 = 0V.

3. Gain def ine d as: G V = ∆VPIN1∆VPIN3(VPIN3 = 0 to 0.8V)

Parameter Symbol Conditions Min. Typ. Max. Unit

ERROR AMPLIFIER SECTION

Input Voltage VI TPIN1 = 2.5V 2.42 2.50 2.58 V

Input Bias Current IBIAS - - -0.3 - 2 uA

Open Loop Gain GVO VO = 2V to 4V (NOTE 1) 65 90 - dB

Unity Gain Bandwidth GBW TJ= 25°C (NOTE 1) 0.7 1 - MHz

PSRR PSRR VCC = 12V to 25V (NOTE 1) 60 70 - dB

Output Sink Current ISINK VPIN2 = 2.7V

VPIN1 = 1.1V 26-mA

Output Source Current ISOURCE VPIN2 = 2.3V

VPIN1 = 5.0V -0.5 -0.8 - mA

Output High Voltage VOH VPIN2 = 2.3V

R1 = 15KΩ to GND 56-V

Output Low Voltage VOL VPIN2 = 2.7V

R1 = 15KΩ to Pin8 -0.81.1V

OUTPUT SECTION

Output Low Level VOL ISINK = 20mA - 0.1 0.4 V

ISINK = 200mA - 1.5 2.2 V

Output High Level VOH ISOURCE = 20mA 13 13.5 - V

ISOURCE = 200mA 12 13.5 - V

Rise Time tR TJ = 25°C, C1 = 1nF (NOTE 1) - 40 100 ns

Fall Time tF TJ = 25°C, C1 = 1nF (NOTE 1) - 40 100 ns

Output Voltage Swing Limit VOLIM VCC = 27V, C1 = 1nF - 22 - V

UNDER VOLTAGE LOCKOUT SECTION

Start Threshold VTH UC3842A 15 16 17 V

UC3843A 7.8 8.4 9.0 V

Min. Operating Voltage

( After turn on ) VTL UC3842A 9 10 11 V

UC3843A 7.0 7.6 8.2 V

PWM SECTION

Maximum Duty Cycle DMAX UC3842A/UC3843A 94 96 100 %

Minimum Duty Cycle DMIN ---0%

TOTAL STANDBY CURRENT

Start-Up Current IST --0.20.4mA

Operating Supply Current ICC VPIN2 = VPIN3 = 0V - 11 17 mA

VCC Zener Voltage VZ ICC = 25mA - 29 - V

UC3842A/UC3843A

Mechanical Dimensions

Package

6.40 ±0.20

3.30 ±0.30

0.130 ±0.012

3.40 ±0.20

0.134 ±0.008

#4 #5

0.252 ±0.008

9.20 ±0.20

0.79

2.54

0.100

0.031

()

0.46 ±0.10

0.018 ±0.004

0.060 ±0.004

1.524 ±0.10

0.362 ±0.008

9.60

0.378 MAX

5.08

0.200

0.33

0.013

7.62

0~15°

0.300

MAX

MIN

0.25 +0.10

–0.05

0.010+0.004

–0.002

8-DIP

UC3842A/UC3843A

Mechanical Dimensions (Continued)

Package

4.92 ±0.20

0.194 ±0.008

0.41 ±0.10

0.016 ±0.004

1.27

0.050

5.72

0.225

1.55 ±0.20

0.061 ±0.008

0.1~0.25

0.004~0.001

6.00 ±0.30

0.236 ±0.012

3.95 ±0.20

0.156 ±0.008

0.50 ±0.20

0.020 ±0.008

5.13

0.202 MAX

#4 #5

0~8°

0.56

0.022

()

1.80

0.071

MAX0.10

MAX0.004

MAX

MIN

+0.10

-0.05

0.15+0.004

-0.002

0.006

8-SOP

UC3842A/UC3843A

Ordering Information

Product Number Package Operating Temperature

UC3842AN 8 DIP

0 ~ + 70°C

UC3842AD 8 SOP

UC3843AN 8 DIP

UC3843AD 8 SOP

UC3842A/UC3843A

7/12/00 0.0m 001

Stock#DSxxxxxxxx

” 2000 Fairch il d Semiconduc tor International

LIFE SU PP ORT POL ICY

FAIRCHILD’S PRODUCTS AR E NOT AUTHORIZED FOR USE AS C RITICAL COMPONENTS I N LIFE S UPPORT DEVICE S

OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR

INTERNATIONAL. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the body,

or (b) support or sustain life, and (c) whose failure to

perform when properly used in accordance with

instructions for use provided in the labeling, can be

reasonably expected to result in a significant injury of the

user.

2. A critical component in any component of a life support

device or syst em who se failure to perform can be

reasonably expected to cause the failure of the life support

device or system, or to affect its safety or effec tiv ene ss.